R5000 Improves FP for MIPS Midrange; 1/22/96

Silicon Graphics’ popular Indy workstation line will get a big boost from the R5000 processor, due this spring. The new chip, a follow-on to the Orion design, combines improved integer speed with strong floating-point performance for a midrange processor. At 200 MHz, the R5000 is expected to deliver better than 5.2 SPECint95 and 5.2 SPECfp95 in initial systems. The compact design fits into just 84 mm2 of silicon, allowing the 200-MHz version to sell for $365, with lower prices for slower speeds. The original Orion chip, the R4600, helped the Indy line become a top seller by providing solid integer performance at a low price. The R4600 (see 061507.PDF) was designed for NT-based PCs, however, and so included a relatively slow floating-point unit, hampering its performance on some workstation applications. The R5000 features a much faster FPU and adds the ability to dispatch an integer and an FP instruction in the same cycle; these features help increase SPECfp/MHz by 30% compared with the R4600. Figure 1 shows a block diagram of the new part. Like Orion, the R5000 was developed by Quantum Effect Design (QED), led by ex-MIPS designers Earl Killian (now back at MIPS) and Tom Riordan. Unlike Orion, the R5000 was funded by MIPS Technologies and has been licensed by IDT, NEC, and NKK. Both NEC and IDT are now sampling the device and expect production in March; NKK is a few months behind. In addition to SGI, system maker Siemens-Nixdorf plans to use the R5000. The chip, particularly future derivatives, should also make its way into high-end printers and other embedded applications. Other MIPS partners, however, are ignoring the R5000 for now, focusing on the higher performance of the forthcoming R10000. R5000 Improves FP f New MIPS Processor Boosts Clock Speed